Abstract
For thin-film transistor liquid crystal display
(TFT-LCD) panel manufacturing, a gate driver circuit with
amorphous silicon TFT plays an important role. In this paper,
an amorphous silicon gate (ASG) driver circuit is optimized to
improve circuit’s dynamic characteristics. The adopted simulation-
based evolutionary method integrates genetic algorithm and
circuit simulator on the unified optimization framework. The
circuit consisting of 14 hydrogenated amorphous silicon TFTs
(a-Si:H TFTs) used in a large panel is optimized for the given
specifications of the rise time 1.5 s, the fall time 1.5 s, and
the ripple voltage 3 V with minimizing the total layout area. By
optimizing the width and passive components of the 14 devices, the
results of this study successfully meet the desired specifications,
where the sensitivity analysis is further conducted to verify the
characteristic variation with respect to the optimized parameters.
To validate the results, the optimized circuit is fabricated with
4- m a-Si:H TFT process, and the experimental result confirms
the practicability of achieved design. The ripple voltage within 2.0
V is successfully obtained while the rise and fall times satisfy the
required specifications for the fabricated sample. A 35% reduction
of the optimized total devices width of a-Si:H TFTs is achieved.
Index Terms—Amorphous silicon gate driver circuits (GDCs),
dynamic characteristic, fabrication, fall time, genetic algorithm,
liquid crystal display (LCD), measurement, panel manufacturing,
ripple voltage, rise time, simulation-based optimization, thin-film
transistor (TFT).
